1. Field of the Invention
The present invention relates to X-ray detectors. More particularly, it relates to Thin Film Transistor (TFT) array substrates for use in X-ray detectors.
2. Description of Related Art
A widely used method of medical diagnosis is the X-ray film. As such films produce photographic images, time consuming film-processing procedures are required to obtain the results. However, digital X-ray sensing devices (referred to hereinafter as X-ray detectors) employing thin film transistors have been developed. Such X-ray sensing devices have the advantage of providing real time diagnosis.
FIG. 1 is a schematic cross-sectional view illustrating the structure and operation of an X-ray detector 100 according to a conventional art. Included are a lower substrate 1, a thin film transistor 3, a storage capacitor 10, a pixel electrode 12, a photoconductive film 2, a protection film 20, a conductive electrode 24 and a high voltage D.C. (direct current) power supply 26.
The photoconductive film 2 produces electron-hole pair 6 in proportion to the strength of external signals (such as incident electromagnetic waves). That is, the photoconductive film 2 acts as a converter that converts external signals, particularly X-rays, into electric signals. When an external voltage Ev is applied across a conductive electrode 24, that voltage causes the electron-hole pairs 6 in the photoconductive film 2 to separate such that X-ray induced electrical charges accumulate on the pixel electrode 12. Thus, either the electrons or the holes are then gathered by the pixel electrode 12 as electric charges.
As shown in FIG. 1, the pixel electrode 12 is located beneath the photoconductive film 2, and the electric charges that are gathered depend on the voltage (Ev) polarity that is applied to the conductive electrode 24 by the high voltage D.C. power supply 26. The gathered electric charges are accumulated in the storage capacitor 10, which is formed in connection with a grounding line. Charges in the storage capacitor 10 are then selectively transferred through a thin film transistor (TFT) 3, which is controlled externally, to an external image display device that forms an X-ray image.
In such an X-ray image sensing device, to detect and convert weak X-ray signals into electric charges, it is beneficial to decrease the trap state density (for the electric charge) in the photoconductive film 2 and to decrease charge flow in non-vertical directions. Further for sensing the weak X-ray signals, it is also essential to decrease leakage current when the TFT 3 is turned off.
FIG. 2 is a plan view illustrating one pixel of an array substrate for an X-ray detector according to the conventional art. A gate line 30 is arranged in a transverse direction and a data line 40 is arranged in a longitudinal direction. A thin film transistor (TFT) 3 acting as a switching element is formed near each crossing of the gate and data lines 30 and 40. A storage capacitor 10, which is arranged in a pixel region defined by a pair of gate line 30 and data line 40, includes a capacitor electrode 46, a pixel electrode 56 and a dielectric layer. The capacitor electrode 46 acts as not only a first electrode of the storage capacitor 10 but also a common electrode by way of being connected to its neighboring capacitor electrode. The pixel electrode 56 corresponds to the capacitor electrode 46 to act as a second electrode of the storage capacitor 10. Although not shown in FIG. 2, a dielectric layer is interposed between the capacitor electrode 46 and the pixel electrode 56. The pixel electrode 56 gathers the electric charges generated in the photoconductive film in order to keep the electric charges in the storage capacitor 10. Furthermore, the pixel electrode 56 is electrically connected to a drain electrode 44 of the TFT 3 via a drain contact hole 50 for transmitting the electric charges to the data line 40 through the TFT 3.
The operation of the X-ray detector described above is as follows. The electronic charges generated in the photoconductive film are gathered in the pixel electrode 56 and stored in the storage capacitor 10 having the capacitor electrode 46. The stored electronic charges are then moved to a source electrode 42 through the pixel and drain electrodes 56 and 44 by the operation of the TFT 3. Thereafter, the electronic charges move through the data line 40 and finally display the images in the external image display device.
The fabrication steps of the array substrate illustrated in FIG. 2 will be explained with reference to FIGS. 3A to 3G, which are cross-sectional views taken along line III—III of FIG. 2.
Referring to FIG. 3A, a first metal layer is formed on a substrate 1 by depositing a metallic material such as Aluminum (Al) or Al-alloy (e.g., AlNd). A gate line (see reference element 30 of FIG. 2) and a gate electrode 32 that extends from the gate line are then formed by patterning the first metal layer. As a material for the substrate 1, either a quartz having a high melting point or a glass having a relatively low melting point can be used. Since the glass is cheap and has a low melting point rather than the quartz, the glass is more adequate for the substrate that is used in under the low temperature process.
In FIG. 3B, a first insulation layer 60 is deposited to a thickness of 4000 angstroms (Å) over the substrate 1 and over the first patterned metal layer. The first insulation layer 60 can be comprised of an inorganic substance, such as Silicon Nitride (SiNx) or Silicon Oxide (SiOx). A pure amorphous silicon (a-Si:H) layer and a doped amorphous silicon (n+ a-Si:H) layer are sequentially formed on the first insulation layer 60. Those silicon layers are then patterned to form an active layer 62 and an ohmic contact layer 64. CVD (Chemical Vapor Deposition) or the Ion Injection Method can beneficially be used to form the doped amorphous silicon layer.
FIG. 3C shows a step of forming a source electrode 42, a drain electrode 44, and a capacitor electrode 46. First, a second conductive metal layer is deposited on the first insulation layer 60 to cover the active layer 62 and the ohmic contact layer 64. The second conductive metal layer is then patterned to simultaneously form the source electrode 42, which extends from the data line 40 over the gate electrode 32; the drain electrode 44, which is spaced apart from the source electrode 42 and over the gate electrode 32; and the capacitor electrode 46, which is the first electrode of the storage capacitor 10 (see FIG. 2). Thereafter, a portion of the ohmic contact layer 64 on the active layer 62 is then etched to form a channel region using the source and drain electrodes 42 and 44 as masks. Thus, the TFT 3 (see FIG. 2) is complete.
Next in FIG. 3D, a planarizing protection layer 66 that acts as a dielectric layer in the storage capacitor is formed over the TFT and on the capacitor electrode 46. The planarizing protection layer 66 is then patterned to form a drain contact hole 50 to expose a portion of the drain electrode 44. The planarizing protection layer 66 is made of an organic material, such as benzocyclobutene (BCB) or acryl-based resin, thereby planarizing the surface of the substrate 1 having the TFT and capacitor electrode 66.
Referring now to FIG. 3E, a pixel electrode 56, which connects to the drain electrode 44 via the drain contact hole 50, is formed by depositing and patterning a transparent conductive material such as ITO (indium-tin-oxide) or IZO (indium-zinc-oxide).
Now referring to FIG. 3F, a photoconductive film 2 and a protection layer 20 are sequentially formed on the pixel electrode 56. As described hereinbefore, the photoconductive film 2 converts the external signals, particularly X-rays, into the electrical signals. The photoconductive film 2 is beneficially comprised of an amorphous selenium compound that is deposited in a thickness of 100 to 500 micrometers (μm) by an evaporator. When the photoconductive film 2 is exposed to the X-rays, electron-hole pairs are produced in the photoconductive film in accordance with the strength of the X-rays.
In FIG. 3G, a conductive electrode 24 that is made of a transparent material to transmit the external X-rays is formed on the protection layer 20. If the X-rays are applied to the photoconductive film 2 while an external voltage is applied to the conductive electrode 24, the electron-hole pairs separate and either the electrons or the holes accumulate in the pixel electrode 56 as the electric charges. Therefore, the accumulated electric charges are stored in the storage capacitor (reference element 10 of FIG. 2).
In the above-mentioned array substrate for the X-ray detector, however, some problems occur when practicing the disclosed configuration and process of fabricating the array substrate. The planarizing protection layer 66 made of benzocyclobutene (BCB) directly contacts the active channel that is made of the amorphous silicon, as shown in FIG. 3D. Since BCB of the planarizing protection layer 66 has a poor adhesion to the amorphous silicon of the active channel, a trap state, by which the electric charges are trapped in an interface between the active channel and the planarizing protection layer (i.e., BCB), exists. Therefore, the release of electric charges is reduced and abnormal leakage current occurs as shown in FIG. 4.
FIG. 4 is a graph showing the relation between gate voltage (Vg) and drain current (Id) of the thin film transistor according to a conventional X-ray detector. The leakage current characteristics are illustrated in the graph of FIG. 4. When the gate voltage is 0V, the thin film transistor does not operate, and the electric current flowing through the thin film transistor ideally should be close to zero (0). However, when the trap state exists in the active channel, the current “K” affecting the operating characteristics of TFT (i.e., leakage current) remains, although the gate voltage is zero (0V), as shown in FIG. 4.
Furthermore in the above-mentioned array substrate for the X-ray detector, since the planarizing protection layer (i.e., BCB) serves as a dielectric layer in the storage capacitor, the thickness of the dielectric layer is increased. As a result, the capacity of the storage capacitor is reduced.